Fellow, High-Speed IO Design

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. Tenstorrent is seeking a Fellow in High-Speed IO Design to serve as a technical authority for our Analog Design function. In this role, you will define the long-term vision for our differentiated die-to-die chiplet PHY IP and establish the strategic technical direction that will influence both our organization and the broader industry. This role is hybrid, based out of Fort Collins, CO. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who you are A respected authority in Analog/Mixed-Signal design who inspires creativity and elevates the work of engineering teams across the company. A visionary leader capable of architecting next-generation die-to-die chiplet PHY IP and key AMS blocks in the most advanced deep sub-micron FinFET technologies. A strategic problem-solver who creates clarity from ambiguity, identifying critical technical hurdles and charting a clear course to industry-leading solutions. A key leadership partner who fosters strategic partnerships across architecture, digital, software, and manufacturing to ensure our IP meets aggressive company-level outcomes. What we need BSEE/MSEE/PhD with extensive, industry-leading experience in analog/mixed-signal IC design, specifically in pushing the boundaries of PLL and AMS design in advanced FinFET processes. A proven track record of driving functional goals and owning outcomes that have had a measurable impact across an entire company or product line. Deep expertise in high-speed datacomm/SerDes and die-to-die PHY design, with the ability to foresee and articulate emerging trends and technical challenges. Mastery of the full silicon lifecycle, with the foresight to anticipate long-term impacts of design decisions on production quality and scalability. An influential mentor and advisor who defines and models technical excellence, shaping the company’s engineering culture. Expertise in formulating strategic solutions for complex circuits (bias generators, LDOs, ADCs/DACs, etc.) that solve novel technical challenges at the forefront of the industry. What you will do Establish Company Vision: Set the technical roadmap for die-to-die chiplet PHY IP, ensuring Tenstorrent remains at the cutting edge of advanced FinFET nodes. Drive Strategic Solutions: Identify and solve emerging technical problems that impact the organization at a strategic level, using novel techniques and expert-level judgment. Elevate the Organization: Act as a mentor and advisor to all levels of the engineering team, fostering a culture of innovation and excellence. Own Company Outcomes: Take responsibility for specific company-level outcomes, ensuring that AMS IP is not only high-performing but also scalable and reusable across the entire product portfolio. Compensation for all engineers at Tenstorrent ranges from $100k - $500k including base and variable compensation targets. Experience, skills, education, background and location all impact the actual offer made. Tenstorrent offers a highly competitive compensation package and benefits, and we are an equal opportunity employer. This offer of employment is contingent upon the applicant being eligible to access U.S. export-controlled technology. Due to U.S. export laws, including those codified in the U.S. Export Administration Regulations (EAR), the Company is required to ensure compliance with these laws when transferring technology to nationals of certain countries (such as EAR Country Groups D:1, E1, and E2). These requirements apply to persons located in the U.S. and all countries outside the U.S. As the position offered will have direct and/or indirect access to information, systems, or technologies subject to these laws, the offer may be contingent upon your citizenship/permanent residency status or ability to obtain prior license approval from the U.S. Commerce Department or applicable federal agency. If employment is not possible due to U.S. export laws, any offer of employment will be rescinded.